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Author nascheme
Recipients christian.heimes, ggardet, nascheme, tim.peters, vstinner
Date 2021-04-01.00:56:52
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Message-id <1617238613.04.0.53352811335.issue43593@roundup.psfhosted.org>
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> If MTE is actually being used, system software assigns "random" values to 4 of the higher-order bits.

Oh, interesting.

Two ideas about handling that: we could change our assertion check to be different on ARM platforms that we know have a certain size physical address space.  Probably just turn off that high-bits check.

Second idea, we could change the radix tree to not assume high address bits are unused.  That's trickier to do without performance or memory usage degradations.  I have a work-in-progress patch that adds a cache on top of the radix tree lookup.  It looks like that cache can be made to have a pretty high hit rate.  Based on a small amount of testing, the radix tree lookup for address_in_range() only happens about 1% of the time.  If that approach works, we could add another layer to the tree and handle the full 64-bit address space.

Based on my wip testing, my benchmark was showing about equal performance with the cache to without.  So, no benefit to offset the increase in code complexity.  Handling the MTE high bits tricks might enough to justify the cache addition.
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Date User Action Args
2021-04-01 00:56:53naschemesetrecipients: + nascheme, tim.peters, vstinner, christian.heimes, ggardet
2021-04-01 00:56:53naschemesetmessageid: <1617238613.04.0.53352811335.issue43593@roundup.psfhosted.org>
2021-04-01 00:56:53naschemelinkissue43593 messages
2021-04-01 00:56:52naschemecreate