Message264018
Maybe we should adopt a difference approach.
There is something called "inline caching": put the cache between instructions, in the same memory block. Example of paper on CPython:
"Efficient Inline Caching without Dynamic Translation" by Stefan Brunthaler (2009)
https://www.sba-research.org/wp-content/uploads/publications/sac10.pdf
Maybe we can build something on top of the issue #26219 "implement per-opcode cache in ceval"? |
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2016-04-22 14:05:46 | vstinner | set | recipients:
+ vstinner, lemburg, rhettinger, mark.dickinson, pitrou, casevh, skrah, Yury.Selivanov, serhiy.storchaka, yselivanov, josh.r, zbyrne |
2016-04-22 14:05:45 | vstinner | set | messageid: <1461333945.44.0.88161417026.issue21955@psf.upfronthosting.co.za> |
2016-04-22 14:05:45 | vstinner | link | issue21955 messages |
2016-04-22 14:05:45 | vstinner | create | |
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