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Author tim.peters
Recipients Serge Anuchin, mark.dickinson, r.david.murray, rhettinger, serhiy.storchaka, skrah, steven.daprano, tim.peters, vstinner
Date 2015-07-03.01:41:02
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Message-id <1435887663.81.0.750154052712.issue24546@psf.upfronthosting.co.za>
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I'm guessing this is a "double rounding" problem due to gcc not restricting an Intel FPU to using 53 bits of precison:

> In binary, (2**53-1)/2**53 * 2049 is:
>
> 0.11111111111111111111111111111111111111111111111111111
> times
> 100000000001.0
>
> which is exactly:
>
> 100000000000.11111111111111111111111111111111111111111 011111111111

The internal Intel "extended precision" format has 64 bits in the mantissa.  The last line there has 65 bits in all (53 to the left of the blank, and 12 to the right).  Rounding _that_ to fit in 64 bits throws away the rightmost "1" bit, which is "exactly half", and so nearest/even rounding bumps what's left up by 1, leaving the 64-bit:

100000000000.11111111111111111111111111111111111111111 10000000000

in the extended-precision register.  Rounding that _again_ to fit in 53 bits then yields the observed

100000000001.0

result.  No int i with 0 < i < 2049 produces the same kind of double-rounding surprise.

And with that I have to bow out - people have spent many years arguing with gcc developers about their floating-point decisions, and they rarely budge.  Why does -m32 have something to do with it?  "Just because" and "tough luck" are typically the only responses you'll get ;-)
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Date User Action Args
2015-07-03 01:41:03tim.peterssetrecipients: + tim.peters, rhettinger, mark.dickinson, vstinner, steven.daprano, r.david.murray, skrah, serhiy.storchaka, Serge Anuchin
2015-07-03 01:41:03tim.peterssetmessageid: <1435887663.81.0.750154052712.issue24546@psf.upfronthosting.co.za>
2015-07-03 01:41:03tim.peterslinkissue24546 messages
2015-07-03 01:41:02tim.peterscreate